Innovative LDPC Post-Processor Architecture for Low Error Floor Conditions in Net Zero Carbon Buildings

Authors

  • Keith Arthur, Albert Ralph Department of Computer Architecture, University of Mississippi

Keywords:

LDPC, post-processor architecture, error floor, net zero carbon buildings, sustainable construction, communication systems, signal-to-noise ratio, error correction

Abstract

Net zero carbon buildings represent a significant advancement in sustainable construction, aiming to minimize carbon emissions throughout their lifecycle. However, achieving reliable communication in such buildings, especially under low signal-to-noise ratio (SNR) conditions, poses a challenge due to the presence of error floors in traditional error correction coding schemes. This paper proposes an innovative LDPC post-processor architecture designed specifically to mitigate error floors in communication systems deployed in net zero carbon buildings. The architecture leverages advanced LDPC decoding algorithms and adaptive techniques to enhance error correction performance under challenging SNR conditions. Simulation results demonstrate significant improvements in error correction capability, thereby enabling reliable communication in net zero carbon buildings.

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Published

2024-04-28